1. Field of the Invention
The present invention relates to a current source circuit used in electronic equipment and a semiconductor integrated circuit, and an amplifier using the current source circuit.
2. Description of the Related Art
Conventionally, a current source circuit used in electronic equipment and a semiconductor integrated circuit is disclosed as a current mirror circuit, for example, in JP 2(1990)-124609 A, and Semiconductor Circuit Design Technology (Nikkei Business Publishers Inc., edited by T. Tamai, 1st edition, p. 302).
FIG. 20 is a circuit diagram showing an exemplary configuration of a conventional current source circuit. In FIG. 20, reference numeral 1 denotes a power supply terminal for supplying a voltage for operating a circuit, 2 denotes a reference current source for supplying a reference current, 4 denotes an output terminal through which a current flows out, 5 denotes an output terminal through which a current flows in, M2, M12, and M7 denote n-channel MOS transistors, and M6 and M20 denote p-channel MOS transistors. M2, M12, and M7 constitute a current mirror circuit, and M6 and M20 also constitute a current mirror circuit.
Next, the operation of the current source circuit thus configured will be described. The current that flows in from the reference current source 2 is received by the n-channel MOS transistor M2, and inverted by the n-channel MOS transistors M7 and M12, respectively. The current inverted by the n-channel MOS transistor M7 is drawn in through the output terminal 5. The current inverted by the n-channel MOS transistor M12 is received by the p-channel MOS transistor M20, and further inverted by the p-channel MOS transistor M6 to flow out through the output terminal 4.
FIG. 21 is a circuit diagram showing an exemplary configuration of a current source circuit configured in the same way as in FIG. 20, which includes the reference current source 2 through which a current flows out, the p-channel MOS transistors M2, M12, and M7, and the n-channel MOS transistors M6 and M20.
Furthermore, a common feedback circuit for setting an operation point of an amplifier using the current source circuit shown in FIG. 20 is disclosed, for example, in “CMOS Analog Circuit Design Second Edition” (p. 196, published by OXFORD, Phillip E. Allen, Douglas R. Holberg). FIG. 22 shows the configuration of this amplifier.
In FIG. 22, reference numeral 6 denotes a voltage source, 8 and 9 denote input terminals of the amplifier, 11 and 12 denote loads, 13 and 14 denote output terminals of the amplifier, M10, M11, M18, and M19 denote n-channel MOS transistors, and M6a, M6b, M8, and M9 denote p-channel MOS transistors.
Next, the operation of the amplifier thus configured will be described. Signals input from the input terminals 8 and 9 of the amplifier are converted into currents by the n-channel MOS transistors M18 and M19 constituting a differential amplifier, and formed into amplified voltages by the loads 11 and 12 to be taken out from the output terminals 13 and 14 of the amplifier. In order to determine an operation point of the amplifier, the voltage at a connection point between the loads 11 and 12 is compared with the voltage of the voltage source 6 by the n-channel MOS transistors M10 and M11 constituting the differential amplifier (error amplifier), whereby currents flowing through the current mirror circuits M8, M6a, and M6b are adjusted. As a result, the operation points of the loads 11 and 12 are set to be the voltage of the voltage source 6.
Conventionally, in the case where an inflow current and an outflow current are used simultaneously in a current source circuit of electronic equipment and a semiconductor integrated circuit and a current source circuit used in an amplifier, there is a problem that these currents are not equal to each other.
In MOS transistor properties, a current Ids is represented by the following expression:Ids=k×(Vgs−Vt)2×(1+λ×Vds)where Ids is a current of a MOS transistor, k is an amplification ratio, Vgs is a gate-source voltage, Vt is a threshold voltage, λ is a channel length modulation coefficient, and Vds is a drain-source voltage. A supplied current is influenced by a channel modulation effect every time it passes through a MOS transistor. Assuming that the sizes of the transistors are designed to be equal to each other, Vds is set to be substantially the same, and λ of the n-channel is substantially the same as that of the p-channel, a current ratio of an inflow current I5 flowing through the output terminal 5 to an outflow current I4 flowing through the output terminal 4 in FIG. 20 is approximated as follows:
      I4    /    I5    =                              (                      1            +                          λ              ×              Vds                                )                2            /              (                  1          +                      λ            ×            Vds                          )              ⁢                  ⁢                  =          (              1        +                  λ          ×          Vds                    )      and the current ratio is not 1. For example, when λ=0.05 and Vds=1.5 V, an error of 7.5% occurs, and thus, an outflow current is larger than an inflow current.
Similarly, even in the common feedback circuit shown in FIG. 22, a similar error occurs. However, this error further can be reduced by a loop gain A1 determined by the n-channel MOS transistors M10, M11 constituting a differential amplifier (error amplifier), the current mirrors M8, M6a, M6b, and the loads 11 and 12. It should be noted that the loop gain A1 cannot be set to be large in order to prevent oscillation, and can be set to be at most 10 times. Thus, the error is reduced to 1/10, and 0.75% error remains. Furthermore, the loads 11 and 12 are placed in a loop of the common feedback circuit, so that they cannot take large values in order to prevent oscillation. Consequently, the gain of the differential amplifier composed of the n-channel MOS transistors M18 and M19 cannot be set to be large.